Memory provides data storage for electronic systems. Flash memory is one type of memory, and has numerous uses in computers and other devices. For instance, personal computers may have BIOS stored on a flash memory chip. As another example, flash memory is used in solid state drives to replace spinning hard drives. As yet another example, flash memory is used in wireless electronic devices as it enables manufacturers to support new communication protocols as they become standardized, and to provide the ability to remotely upgrade the devices for improved or enhanced features.
A typical flash memory comprises a memory array that includes a large number of memory cells arranged in row and column fashion. The flash memory may be erased and reprogrammed in blocks. NAND may be a basic architecture of flash memory. A NAND cell unit comprises at least one selecting device coupled in series to a serial combination of memory cells (with the serial combination commonly being referred to as a NAND string). Example NAND architecture is described in U.S. Pat. No. 7,898,850.
Flash memory cell strings have historically been arranged to extend horizontally, although vertically extending memory cell strings are now being considered. One goal in fabrication of vertical memory cell strings is to reduce the horizontal area of the substrate occupied by the memory cells as compared to horizontally extending memory cell strings, albeit typically at the expense of increased vertical thickness. Nevertheless, vertically orienting memory cell strings can create horizontal packing density considerations not present in horizontally oriented memory cell string layouts.
The memory cells of an individual vertically extending string are typically formed in different tiers or levels within a stack of materials in an array circuitry region. A peripheral circuitry region commonly surrounds an individual array region and may include read/write, logic, control/timing, amplifier, and/or other circuitry that may in some way engage with the memory cells in the array circuitry region. The materials in the stack in the array circuitry region include combinations of conductive, semiconductive, and insulative materials many of which are typically deposited blanketly over the entire wafer. These are patterned within the array circuitry region to form the individual vertical strings of memory cells having associated sense and access lines. At some point, the components in the peripheral circuitry region are patterned and which commonly includes removing most or all of the tier materials from the peripheral circuitry region. This may include back-fill with dielectric material that largely replaces the stack of tier materials that were originally in the peripheral circuitry region. The back-filled dielectric, unfortunately, has a tendency to densify and shrink at a much greater rate than occurs, if any, in the stack of tier materials in the array circuitry region. This creates stress and lateral pulling of the array region material toward the peripheral region, particularly in regions closest to the periphery of the array region. This can cause vertical slits that were previously formed within the array circuitry region to widen and/or cause undesirable vertical cracks to form in the stack of tier materials. These may subsequently get filled with conductive material and result in shorts and/or inoperable circuitry.